▎ 摘　　要

Single layer graphene (SLG) grown by chemical vapor deposition (CVD) has been investigated for its prospective application as horizontal interconnects in very large scale integrated circuits. However, the major bottleneck for its successful application is its degraded electronic transport properties due to the resist residual trapped in the grain boundaries and on the surface of the polycrystalline CVD graphene during multi-step lithographic processes, leading to increase in its sheet resistance up to 5 M Omega/sq. To overcome this problem, current induced annealing has been employed, which helps to bring down the sheet resistance to 10 k Omega/sq (of the order of its initial value). Moreover, the maximum current density of similar to 1.2 x 10(7) A/cm(2) has been obtained for SLG (1 x 2.5 mu m(2)) on SiO2/Si substrate, which is about an order higher than that of conventionally used copper interconnects. (C) 2014 AIP Publishing LLC.