• 文献标题:   Performance Limits and Potential of Multilayer Graphene-Tungsten Diselenide Heterostructures
  • 文献类型:   Article
  • 作  者:   YANG SH, YANG FS, TANG HL, CHIU MH, LEE KC, LI MJ, LIN CY, LI LJ, TUNG V, XU Y, SHI YM, LIEN CH, LIN YF
  • 作者关键词:   contact resistance, device performance, graphenetungsten diselenide heterostructure, lowfrequency noise measurement, multilayer graphene contact
  • 出版物名称:   ADVANCED ELECTRONIC MATERIALS
  • ISSN:   2199-160X
  • 通讯作者地址:  
  • 被引频次:   1
  • DOI:   10.1002/aelm.202100355 EA SEP 2021
  • 出版年:   2021

▎ 摘  要

Atomically thin tungsten diselenide (WSe2) transistors with multilayer graphene (w/ G) as contact electrodes are successfully fabricated by a precise area-controllable chemical vapor deposition method. The performance and electrical properties of the devices are explored. Compared to those of WSe2 transistors without graphene contacts (w/o G), the maximum current densities of the w/ G-WSe2 transistors increase by one to two orders of magnitude. In addition, the device performance is markedly improved for the w/ G-WSe2 transistors, including an on/off current ratio of approximate to 10(7), subthreshold swing of approximate to 150 mV/decade, and threshold voltage of approximate to 1.75 V. The improved performance of the w/ G-WSe2 transistors is ascribed to the alleviation of electrical contributions from metal-semiconductor contact resistance, which is consistent with the analysis of low-frequency noise measurements. In addition, self-trapping behavior in the WSe2 channel is found, which possibly paves a way to further optimize the performance of layered devices. Finally, an inverter using the w/ G-WSe2 transistors is demonstrated. These transistors represent a step forward in the development of layered graphene-based electronics suitable for energy-efficient and high-performance industrial-scale products.