• 文献标题:   Maximizing the Current Output in Self-Aligned Graphene-InAs-Metal Vertical Transistors
  • 文献类型:   Article
  • 作  者:   LIU Y, GUO J, ZHU EB, WANG PQ, GAMBIN V, HUANG Y, DUAN XF
  • 作者关键词:   graphene, vertical transistor, high current density, van der waals heterostructure, inas film, resistor network model
  • 出版物名称:   ACS NANO
  • ISSN:   1936-0851 EI 1936-086X
  • 通讯作者地址:   Univ Calif Los Angeles
  • 被引频次:   6
  • DOI:   10.1021/acsnano.8b08617
  • 出版年:   2019

▎ 摘  要

With finite density of states and electrostatically tunable work function, graphene can function as a tunable contact for a semiconductor channel to enable vertical field-effect transistors (VFETs). However, the overall performance, especially the output current density, is still limited by the low conductance of the vertical semiconductor channel, as well as large series resistance of the graphene electrode. To overcome these limitations, we construct a VFET by using single-crystal InAs film as the high-conductance vertical channel and self-aligned metal contact as the source-drain electrodes, resulting in a record high current density over 45 000 A/cm(2) at a low bias voltage of 1 V. Furthermore, we construct a device-level VFET model using the resistor network method, and experimentally validate the impact of each geometry parameter on device performance. Importantly, we found the device performance is not only a function of the intrinsic channel material, but also greatly influenced by device geometries and footprint. Our study not only pushes the performance limit of graphene VFETs, but also sheds light on van der Waals integration between two-dimensional material and conventional bulk material for high-performance VFETs and circuits.