▎ 摘　　要

In this paper, we characterize the performance of monolithically integrated graphene interconnects on a prototype 0.35-mu m CMOS chip. The test chip implements an array of transmitter/receivers to analyze the end-to-end data communication on graphene wires. Large-area graphene sheets are first grown by chemical vapor deposition, which are then subsequently processed into narrow wires up to 1 mm in length. A low-swing signaling technique is applied, which results in a transmitter energy of 0.3-0.7 pJ/b . mm(-1) and a total energy of 2.4-5.2 pJ/b . mm(-1). Bit error rates below 2 x 10(-10) are measured using a 2(31) - 1 pseudorandom binary sequence. Minimum voltage swings of 100 mV at 1.5-V supply and 500 mV at 3.3-V supply have also been demonstrated. At present, the graphene wire is largely limited by its growth quality and high sheet resistance.