▎ 摘　　要

Universal logic gates NAND and NOR along with NOT and XOR are successfully implemented using graphene cantilever structures. Three-dimensional (3D) modeling of different graphene cantilever structures is carried out using the COMSOL Multiphysics software. The high electrical conductivity of graphene makes it a better choice for the cantilever beams in this study. A very low actuation voltage of 1.57 V is obtained for a 2-mu m-long, 0.2-mu m-wide, and 5-nm-thick graphene cantilever beam. For all the cantilever-based logic gates, the switching speed is 45 ns. The simulated cantilever-based logic gates could enable the implementation of different digital circuits.