▎ 摘　　要

High-performance graphene field-effect transistors (G-FETs) are fabricated with carrier mobility of up to 5400 cm(2)/V . s and top-gate efficiency of up to 120 (relative to that of back gate with 285 nm SiO2) simultaneously through growing high-quality Y2O3 gate oxide at high oxidizing temperature. The transconductance normalized by dimension and drain voltage is found to reach 7900 mu FN . s, which is among the largest of the published graphene FETs. In an as-fabricated graphene FET with a gate length of 310 nm, a peak transconductance of 0.69 mS/mu m is realized, but further improvement is seriously hindered by large series resistance. Benefiting from highly efficient gate control over the graphene channel, the Dirac point voltage of the graphene FETs is shown to be designable via simply selecting a gate metal with an appropriate work function. It is demonstrated that the Dirac point voltage of the graphene FETs can be adjusted from negative to positive, respectively, via changing. the gate material from Ti to Pd.