▎ 摘　　要

Graphene intrinsically hosts charge-carriers with ultrahigh mobility and possesses a high quantum capacitance, which are attractive attributes for nanoelectronic applications requiring graphene-on-substrate base architecture. Most of the current techniques for graphene production rely on the growth on metal catalyst surfaces, followed by a contamination-prone transfer process to put graphene on a desired dielectric substrate. Therefore, a direct graphene deposition process on dielectric surfaces is crucial to avoid polymer-adsorption-related contamination from the transfer process. Here, we present a chemical-diffusion mechanism of a process for transfer-free growth of graphene on silicon-based gate-dielectric substrates via low-pressure chemical vapor deposition. The process relies on the diffusion of catalytically produced carbon radicals through polycrystalline copper (Cu) grain boundaries and their crystallization at the interface of Cu and underneath silicon-based gate-dielectric substrates. The graphene produced exhibits low-defect multilayer domains (L-a similar to 140 nm) with turbostratic orientations as revealed by selected area electron diffraction. Further, graphene growth between Cu and the substrate was 2-fold faster on SiO2/Si(111) substrate than on SiO2/Si(100). The process parameters such as growth temperature and gas compositions (hydrogen (H-2)/methane (CH4) flow rate ratio) play critical roles in the formation of high-quality graphene films. The low-temperature back-gating charge transport measurements of the interfacial graphene show density-independent mobility for holes and electrons. Consequently, the analysis of electronic transport at various temperatures reveals a dominant Coulombic scattering, a thermal activation energy (2.0 +/- 0.2 meV), and two-dimensional hopping conduction in the graphene field-effect transistor. A band overlapping energy of 2.3 +/- 0.4 meV is estimated by employing the simple two-band model.