• 文献标题:   Wafer-scale fabrication of transistors using CVD-grown graphene and its application to inverter circuit
  • 文献类型:   Article, Proceedings Paper
  • 作  者:   NAKAHARAI S, IIJIMA T, OGAWA S, YAGI K, HARADA N, HAYASHI K, KONDO D, TAKAHASHI M, LI SL, TSUKAGOSHI K, SATO S, YOKOYAMA N
  • 作者关键词:  
  • 出版物名称:   JAPANESE JOURNAL OF APPLIED PHYSICS
  • ISSN:   0021-4922 EI 1347-4065
  • 通讯作者地址:   Natl Inst Mat Sci
  • 被引频次:   4
  • DOI:   10.7567/JJAP.54.04DN06
  • 出版年:   2015

▎ 摘  要

Graphene transistors were fabricated by a wafer-scale "top-down" process using a graphene sheet formed by the chemical vapor deposition (CVD) method. The devices have a dual-gated structure with an ion-irradiated channel, in which transistor polarity can be electrostatically controlled. We demonstrated, at room temperature, an on/off operation of current and electrostatic control of transistor polarity. By combining two dual-gated transistors, a six-terminal device was fabricated with three top gates and two ion-irradiated channels. In this device, we demonstrated an inverter operation. (C) 2015 The Japan Society of Applied Physics