▎ 摘　　要

Graphene, due to its unique electronic structure favoring high carrier mobility, is considered a promising material for use in high-speed electronic devices in the post-silicon electronic era. For this reason, experimental research on graphene-based field-effect transistors (GFETs) has rapidly increased in the last years. However, despite the continuous progress in the optimization of such devices many critical issues remain to be solved such as their reproducibility and performance uniformity against possible variations originated by the manufacturing processes or the operating conditions. In the present work, changes of the I-D-V-DS characteristics of a Graphene Field-Effect Transistors, caused by a tolerance of 10% in the active channel (i.e. its length and width) and in the top oxide thickness are numerically investigated in order to assess the reliability of such devices. Design of Experiments (DoE) is adopted with the aim to identify the most influential factors on the electrical performance of the device, so that the fabrication process may be suitably optimized (C) 2020 International Association for Mathematics and Computers in Simulation (IMACS). Published by Elsevier B.V. All rights reserved.