▎ 摘　　要

The recent boom in portable electronic devices requires their power sources to be sufficiently compact and potentially integrated on a flexible chip with other electronic components. However, there is still a challenge to realize 3D spatial engineering of supercapacitor devices in one chip. Herein, a metal selective reduction strategy was developed to achieve the 3D spatial engineering of all-in-one supercapacitors with various architectures and interconnections in one GO film, where rGO structures serve as electrode as well as connection wire, and GO structures act as separator. In such all-carbon integrated supercapacitors, the area, shapes and connection circuits of rGO electrodes can be well controlled via tuning the reduction time, size and pattern of Zn stamp even these rGO electrodes are not in a planar surface, realizing the spatial connection of supercapacitors in series or/and parallel circuits without external connections. 3D spatial engineering of supercapacitors in the GO film can also reduce overall chip design complexity and improve the integration of several supercapacitors per unit area. More importantly, these all-in-one supercapacitors can remain their electrochemical properties under different bending states. Therefore, the universality and ease of this strategy could make it a promising route to design high performance graphene-based energy storage devices.