▎ 摘　　要

Electric field-induced (EFI) reduction of graphene oxide (GO) was performed by conductive atomic force microscopy (C-AFM) in order to create a reduced GO (rGO) p-n nanopattern diode in a dry and non-destructive single-pot process. Single GO sheets were deposited by the Langmuir-Blodgett (LB) method onto semiconducting (n- and p-doping Si) substrates that control charge transfer at the rGO interface. EFI nanolithography resulted in locally reduced GO nanopatterns on GO sheets corresponding to the application of a negative bias voltage on an n-doping Si substrate. EFI nanolithography was performed as a function of applied voltage, and the rGO nanopatterned at -10.0 V(sub) showed high conductivity, comparable with that of the chemically reduced GO. In addition, transport of rGO sheets, which were efficiently reduced under a local electric field, showed a uniform conductivity at sheet edges and the basal plane. Current-voltage (I-V) characteristics of rGO on n- and p-doping Si substrates indicated that EFI reduction nanolithography produced p-type rGO nanopatterns on the Si substrates. In conclusion, we successfully fabricated a p-n diode junction of p-type rGO/n-doping Si into nanopatterns. This junction is an indispensable electronic component that rectifies charge transport and prevents interference between neighboring electronic components in high density integrated crossbar devices.