▎ 摘　　要

Ternary logic technology facilitates simplifying logic circuits and reducing power consumption. In this study, a universal ternary device that can be programmed into an n-type and p-type ternary device is demonstrated using a graphene field-effect transistor with a P(VDF-TrFE)/graphene stack channel. The feasibility of a standard ternary inverter function is demonstrated by complementary ternary GFETs, which have discretely programmed n-doped and p-doped graphene channels with different channel widths. Even though the performance of the ternary inverter should be improved further, the concept of the programmable ternary logic, based on channel width modulation and ferroelectric doping, is useful for future experimental studies on the multi-valued logic architecture.