▎ 摘　　要

Steep-slope devices are predicted to provide excellent quality for analog integrated circuit applications due to their high transconductance efficiency (g(m)/I-ds) breaking the metal-oxide-semiconductor field-effect transistor limit (38.5 V-1). The potential advantage of a Dirac-source FET (DSFET) as an analog transistor is explored based on a graphene/carbon nanotube (CNT) heterojunction. A high g(m)/I-ds beyond 38.5 V-1 over four decades of current is experimentally demonstrated in an individual CNT-based DSFET, reaching a peak value of 66 V-1, which is a new record for all reported transistors. Importantly, this high g(m)/I-ds extends beyond the subthreshold region and leads to transconductance amplification in the overthreshold region. The best peak transconductance at a low bias of -0.1 V exceeds 20 mu S per tube, which has approximately threefold improvement over that of a normal CNT FET with a shorter gate length. Outperforming other advanced devices, the extended high transconductance efficiency greatly promotes DSFET competitiveness in the high-precision analog field.