• 文献标题:   Empirical Drain Current Model of Graphene Field-Effect Transistor for Application as a Circuit Simulation Tool
  • 文献类型:   Article, Early Access
  • 作  者:   BARDHAN S, SAHOO M, RAHAMAN H
  • 作者关键词:   gfet, model, mosfet, nanohub, quantum capacitance, veriloga, spice
  • 出版物名称:   IETE JOURNAL OF RESEARCH
  • ISSN:   0377-2063 EI 0974-780X
  • 通讯作者地址:   Indian Inst Engn Sci Technol
  • 被引频次:   0
  • DOI:   10.1080/03772063.2019.1620639 EA JUN 2019
  • 出版年:  

▎ 摘  要

In this paper, an empirical model of dual gate graphene field-effect transistor (GFET) has been developed. The explicit form of drain current expression has been established analytically based on a drift-diffusion approach. The channel sheet charge density helps us to determine the quantum capacitance more accurately. The channel potential has been derived from the equivalent circuit. The improvement of carrier mobility has been included. The closed form expression is obtained with a few fitting parameters to explore the model characteristics. The model is also valid for single gate technology. The model has been verified against some pioneering experimental results reported in literatures. Model simulation agrees well with existing experimental data. We have also compared the results of the model obtained from NANOHUB online simulator for further verification. The characteristics of small signal parameters of this GFET model have been observed and cut-off frequency has been determined. The developed analytical GFET model is also found to be computationally efficient. It is observed that with +/- 10% variation in top gate oxide thickness, maximum drain current and peak transconductance vary by (-11.53%/ + 14%) and (-25%/+31.25%), respectively. The double gate bilayer GFET model is implemented in Verilog-A and verified for a voltage amplifier in SPICE environment.