▎ 摘　　要

In Part I, we have established a wafer-scale, CMOS compatible graphene transfer for the back end of the line integration. In Part II of this paper, we analyze statistical data of device properties and draw conclusions about possible causes of device failure. Statistical analysis is performed for device mobility and compared with the yield analysis. To complement this analysis, detailed Raman spectra are employed to analyze strain. In addition, device models developed in Part I are examined and provide further insight. From the analysis, it appears that compressive strain introduced during the graphene transfer process is may be the primary source for device failure. Moreover, we speculate based on the device statistics that the mitigation of compressive strain will improve device mobility, carrier density, and reduce variability. In addition, the presence of residues, tears, and cracks in the graphene may result in some device failure.