▎ 摘　　要

Fabrication of high performance micro-supercapacitor (mu-SC) based on Silicon nanowires (SiNWs) at low temperatures by simple, effective and a scalable technique is always desired. In this regard, the performance of the mu-SC was greatly improved by employing a novel architecture developed by coating SiNWs with Graphene (rGO) in the present work. This coating of Graphene was deposited by an easy and efficient technique, Electrophoretic Deposition (EPD), at the room temperature with no intricate steps. These rGO coated SiNWs electrodes show as much as four times larger capacitance (240 mu F/cm(2)) than the bare SiNWs (60 mu F/cm(2)) Moreover, the key advantage of the architecture is that both rGO and SiNWs structurally complement each other enhancing the electrode performance - EPD deposited rGO fills the empty space between SiNWs by making a bridge type structure, increasing the surface area of the electrodes whereas SiNWs prevent restacking and aggregation of the rGO nano-sheets and also provide support to rGO nano-sheets to stand vertically over the substrate. One more notable bonus of using EPD technique is that the wires are selectively coated. SiNWs were synthesized at a temperature of 320 degrees C by the Hot-wire assisted SiNW growth technique and deposition of Graphene oxide (GO) and its reduction into reduced Graphene oxide (rGO) was carried out at the room temperature. The results suggest that rGO coated SiNWs could be a promising candidate as an electrode for on-chip integrable mu-SC application. (C) 2016 Elsevier B.V. All rights reserved.