• 文献标题:   The insertion of high-k dielectric materials in multilayer graphene nanoribbon interconnects for reducing propagation delay and expanding bandwidth
  • 文献类型:   Article
  • 作  者:   XU P, PAN ZL
  • 作者关键词:   mlgnr interconnect, highk dielectric material, propagation delay, step response, transfer gain, 3db bandwidth, onchip interconnect system
  • 出版物名称:   ORGANIC ELECTRONICS
  • ISSN:   1566-1199 EI 1878-5530
  • 通讯作者地址:   South China Normal Univ
  • 被引频次:   0
  • DOI:   10.1016/j.orgel.2019.105607
  • 出版年:   2020

▎ 摘  要

The multilayer graphene nanoribbons (MLGNR) by inserting the high-k dielectric material between adjacent graphene nanoribbons (GNR) layers to reduce propagation delay and to expand bandwidth of the conventional pristine (undoped) MLGNR interconnects is presented in this paper. An equivalent distributed circuit model of the proposed MLGNR interconnect with high-k dielectric materials is established to derive the analytical expressions of propagation delay, step response, transfer gain and 3-dB bandwidth for 7.5 nm technology node at global level. The numerical simulation results show that the maximum reduction of propagation delay between the proposed MLGNR by inserting SrTiO3 dielectric material and the pristine MLGNR can reach 12.746 ns for an interconnect length of 4000 mu m. The corresponding 3-dB bandwidth for them can be expanded over 4 times for the interconnect length. It is demonstrated that the proposed MLGNR by inserting the high-k dielectric material can greatly reduce propagation delay and enhance transfer gain and 3-dB bandwidth compared with the conventional pristine MLGNR interconnects. Moreover, it is found that the results obtained by the proposed model have close agreement with Synopsys HSPICE simulation and the maximum relative error for them is less than 5%, and the average efficiency of CPU runtime is improved 95% by using the proposed model, as compared to HSPICE simulation. The proposed design method has many potential applications in improving performance of MLGNR interconnect and providing guidelines for the next generation on-chip interconnect system.