• 文献标题:   High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures
  • 文献类型:   Article
  • 作  者:   LIU Y, SHENG JM, WU H, HE QY, CHENG HC, SHAKIR MI, HUANG Y, DUAN XF
  • 作者关键词:  
  • 出版物名称:   ADVANCED MATERIALS
  • ISSN:   0935-9648 EI 1521-4095
  • 通讯作者地址:   Univ Calif Los Angeles
  • 被引频次:   26
  • DOI:   10.1002/adma.201506173
  • 出版年:   2016

▎ 摘  要

Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm(-2). This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene-silicon heterostructures.