▎ 摘　　要

The performance of actual graphene FETs suffers significant degradation from that expected for pristine graphene, which can be partly attributed to the onset of defects and the doping of the graphene induced during the fabrication of gate dielectric layers. These effects are mainly due to high-temperature processes such as postdeposition annealing. Here, we propose a novel low-temperature method for the fabrication of gate dielectrics, which consists of the natural oxidation of an ultrathin Al layer and a sol-gel process with oxygen plasma treatment to form an Al2O3 layer. The method results in a significant reduction of defects and doping in graphene, and devices fabricated by this method show an intrinsic carrier mobility as high as 9100 cm(2) V-1 s(-1). (C) 2016 The Japan Society of Applied Physics