▎ 摘　　要

Electrostatic force microscopy and scanning thermal microscopy are employed to investigate the electric transport and localized heating around defects introduced during transfer of graphene grown by chemical vapor deposition to an oxidized Si substrate. Numerical and analytical models are developed to explain the results based on the reported basal-plane thermal conductivity, kappa, and interfacial thermal conductance, G,of graphene and to investigate their effects on the peak temperature. Irrespective of the kappa values, increasing G beyond 4 x 10(7) Wm(-2) K-1 can reduce the peak temperature effectively for graphene devices made on sub-10 nm thick gate dielectric, but not for the measured device made on 300-nm-thick oxide dielectric, which yields a cross-plane thermal conductance (G(ox)) much smaller than the typical G of graphene. In contrast, for typical G values reported for graphene, increasing kappa from 300Wm(-1) K-1 toward 3000Wm(-1) K-1 is effective in reducing the hot spot temperature for the 300-nm-thick oxide devices but not for the sub-10 nm gate dielectric case, because the heat spreading length (l) can be appreciably increased relative to the micron-scale localized heat generation spot size (r(0)) only when the oxide layer is sufficiently thick. As such, enhancement of kappa increases the vertical heat transfer area above the gate dielectric only for the thick oxide case. In all cases considered, the hot spot temperature is sensitive to varying G and kappa only when the G/G(ox) ratio and r(0)/l ratio are below about 5, respectively. Published by AIP Publishing.