▎ 摘　　要

We demonstrated a flash memory device with chemical-vapor-deposited graphene as a charge trapping layer. It was found that the average RMS roughness of block oxide on graphene storage layer can be significantly reduced from 5.9 nm to 0.5 nm by inserting a seed metal layer, which was verified by AFM measurements. The memory window is 5.6V for a dual sweep of +/- 12V at room temperature. Moreover, a reduced hysteresis at the low temperature was observed, indicative of water molecules or -OH groups between graphene and dielectric playing an important role in memory windows.