• 专利标题:   Method for preparing metal oxide/graphene heterojunction transistor, involves preparing gate electrode layer on surface of gate insulating layer silicone dioxide to obtain metal oxide/graphene heterojunction transistor.
  • 专利号:   CN111276402-A
  • 发明人:   SU J, YUAN H, LIN Z, CHANG J
  • 专利权人:   UNIV XIDIAN
  • 国际专利分类:   H01L021/34, H01L021/44, H01L029/417, H01L029/47, H01L029/786
  • 专利详细信息:   CN111276402-A 12 Jun 2020 H01L-021/44 202056 Pages: 11 Chinese
  • 申请详细信息:   CN111276402-A CN10104860 20 Feb 2020
  • 优先权号:   CN10104860

▎ 摘  要

NOVELTY - The method involves preparing a metal oxide layer on a substrate. Two thin layers of graphene are prepared on a metal film by a chemical vapor deposition. Two thin layers of graphene are transferred to different areas on the surface of the metal oxide layer through a self-aligned transfer process. A gate insulating layer silicone dioxide (4) is deposited on the two thin layers of a graphene and a channel formed between the two thin layers of the graphene on the surface of the metal oxide layer by the chemical vapor deposition. A gate electrode layer (5) is prepared on the surface of the gate insulating layer to obtain a metal oxide/graphene heterojunction transistor. The metal film is a copper film or a nickel film. The semiconductor metal oxide is any one of gallium oxide, zinc oxide or tin dioxide. The gate electrode layer is silver. USE - Method for preparing metal oxide/graphene heterojunction transistor (claimed). ADVANTAGE - The interface between the metal oxide and the thin-layer graphene have a smaller Schottky barrier. The transport of carriers at the interface is effectively improved. The device performance is improved. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of the metal oxide/graphene heterojunction transistor. Source-drain electrode layer (3) Gate insulating layer of silicone dioxide (4) Gate electrode layer (5)