▎ 摘　　要

NOVELTY - The device (10) has two conductive layers (110, 140) formed on a diffusion stopper (130). The diffusion stopper includes a stuffing layer (134) partially adhered on a surface of an area of a graphene layer (132). The stuffing layer is formed on surface defect areas i.e. transistor area, of the graphene layer. The stuffing layer includes a polycrystalline structure formed on the defect areas of the graphene layer with a single crystalline structure, where thickness (Td) of the diffusion stopper is smaller than 5nm. USE - Semiconductor device i.e. transistor, for a flat panel display and a nano-sized electric component energy reservoir. ADVANTAGE - The graphene layer and the stuffing layer are formed on the defect areas through an atomic layer deposition (ALD) process, so that carrier concentration of the diffusion stopper can be increased, thus improving reliability and electrical characteristic of the device. DETAILED DESCRIPTION - The stuffing layer is made of material selected from tantalum, tantalum nitride, titanium, titanium nitride, molybdenum nitride, tungsten, tungsten nitride, ruthenium, and cobalt. An INDEPENDENT CLAIM is also included for a semiconductor device manufacturing method. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a semiconductor device. Thickness of diffusion stopper (Td) Semiconductor device (10) Conductive layers (110, 140) Diffusion stopper (130) Graphene layer (132) Stuffing layer (134)