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  • 专利标题:   Graphene nano-belt FET, has gate dielectric layer placed at upper and lower sides of channel layer, substrate formed with gate dielectric layer, and source electrode and drain electrode placed at two ends of channel layer.
  • 专利号:   CN103258850-A
  • 发明人:   ZHANG P, BAO J, MA Z, WU Y, ZHUANG Y, ZHANG C
  • 专利权人:   UNIV XIDIAN
  • 国际专利分类:   B82Y010/00, H01L021/04, H01L029/16, H01L029/78
  • 专利详细信息:   CN103258850-A 21 Aug 2013 H01L-029/78 201376 Pages: 8 Chinese
  • 申请详细信息:   CN103258850-A CN10032909 15 Feb 2012
  • 优先权号:   CN10032909

▎ 摘　　要

NOVELTY - The FET has a gate dielectric layer placed at upper and lower sides of a channel layer. A substrate is formed with the gate dielectric layer. A source electrode and a drain electrode are placed at two ends of the channel layer that is made of a single layer or double layer graphite nano-belt. Thickness of a top part of the gate dielectric layer is about 30nm. USE - Graphene nano-belt FET. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a preparation method of graphene nano-belt FET. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a graphene nano-belt FET.