▎ 摘　　要

NOVELTY - The utility model claims a SiC MOSFET half-bridge packaging structure, the structure comprises: two DBC substrates oppositely set, a first SiC SBD chip is set between the two DBC substrates, a first SiC MOSFET chip, a second SiC SBD chip and a second SiC MOSFET chip; a first SiC SBD chip, the first SiC MOSFET chip is connected with a DBC substrate, the second SiC SBD chip, the second SiC MOSFET chip is electrically connected with the other DBC substrate. top part can greatly reduce the thermal resistance of the SiC MOSFET module; the top part graphene and the bottom of the coating is porous structure, it has larger specific surface area, it provides more space for electron, ion, gas and liquid transmission and storage, it can greatly improve the module moisture-sensitive resistance; In addition, using low Young modulus flexible buffer layer to replace the traditional bonding lead, new module layout, so as to reduce the module loop area, reducing module parasitic inductance, improving the reliability of the module.