• 专利标题:   Wiring used as conductor in semiconductor device (e.g. integrated circuit, or memory chip) or electronic circuit, comprises multilayer graphene including graphene sheets, interlayer substance, and organic compound layer.
  • 专利号:   US2016086890-A1, JP2016063095-A, US9659870-B2
  • 发明人:   MIYAZAKI H, SAKAI T
  • 专利权人:   TOSHIBA KK, TOSHIBA KK
  • 国际专利分类:   H01L021/768, H01L023/528, H01L023/532, C01B031/02, H01B005/02, H01L021/3205, H01L051/00
  • 专利详细信息:   US2016086890-A1 24 Mar 2016 H01L-023/532 201626 Pages: 13 English
  • 申请详细信息:   US2016086890-A1 US842239 01 Sep 2015
  • 优先权号:   JP190565

▎ 摘  要

NOVELTY - Wiring (100) comprises a multilayer graphene (1) including graphene sheets; an interlayer substance (2) disposed between layers of the multilayer graphene; and an organic compound layer (20) connected to a side surface of the multilayer graphene. The organic compound layer contains a photoisomerizable organic group connected to the multilayer graphene. USE - The wiring is useful as conductor in semiconductor device (e.g. integrated circuit (LSI), a central processing unit (CPU), a programmable logic device (PLD), or a memory chip) or electronic circuit. ADVANTAGE - The wiring material can have low resistance and high reliability. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for manufacturing wiring which involves forming a multilayer graphene processed into a wiring pattern shape on a substrate; forming an organic compound layer on a side surface of the multilayer graphene in a longitudinal direction; inserting an interlayer substance into the multilayer graphene having the organic compound layer formed in it; and cis-trans isomerizing an organic group in the organic compound layer. DESCRIPTION OF DRAWING(S) - The drawing shows a perspective schematic diagram of wiring. Multilayer graphene (1) Interlayer substance (2) Graphene interlayer compound (10) Organic compound layer (20) Wiring (100)