• 专利标题:   Fabricating semiconductor device involves loading substrate with structure having opening, into process chamber, forming two-dimensional material layers on upper surface of structure, to overlie opening and form air-gap, where upper portion of air-gap, is defined by two-dimensional material layers.
  • 专利号:   US2023163023-A1, CN116153853-A, KR2023075127-A
  • 发明人:   SHIN K, LEE S, YOON J, AN S, LI Z, YOUN J, AN X, AHN S J, SU Y J, LEE S Y, SHIN K W
  • 专利权人:   SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO LTD
  • 国际专利分类:   H01L021/764, H01L021/768, H01L027/11556, H01L027/11582, H01L021/02
  • 专利详细信息:   US2023163023-A1 25 May 2023 H01L-021/764 202346 English
  • 申请详细信息:   US2023163023-A1 US054970 14 Nov 2022
  • 优先权号:   KR161408

▎ 摘  要

NOVELTY - Fabrication of a semiconductor device involves: 1) forming a structure (10) on a substrate (5), where the structure comprises an opening (15); 2) loading the substrate into a process chamber; 3) forming at least one two-dimensional material layer on an upper surface of the structure, to overlie the opening and form an air-gap, where an upper portion of the air-gap, is defined by at least one two-dimensional material layer; and 4) unloading the substrate from the process chamber. USE - Method is used for fabricating semiconductor device. ADVANTAGE - The method enables forming two-dimensional material layer on the upper surface of semiconductor structure, to close the upper portion of the opening, while growing in transverse and longitudinal directions. Since the two-dimensional material layer covers the upper portion of the opening, without substantially reducing a volume of the opening, a volume of the air-gap formed in the opening and having the upper portion defined by the two-dimensional material layer, is secured as much as possible, so that, when the structure comprises conductive patterns spaced apart from each other, the air-gap may minimize parasitic capacitance between the conductive patterns to improve RC delay (delay in signal speed through circuit wiring), thus improving the electrical performance of the semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows process of fabricating semiconductor device. 5Substrate 10Semiconductor structure 15Opening