• 专利标题:   Low-power charge trapping memory used for electronic device, has silica tunneling layer, capture layer containing graphene oxide quantum dots-zirconium-hafnium composite, silica barrier layer and palladium top electrode.
  • 专利号:   CN107768379-A
  • 发明人:   YAN X, WANG H, ZHANG Y, ZHAO J, ZHOU Z
  • 专利权人:   UNIV HEBEI
  • 国际专利分类:   H01L027/11563, H01L027/11568
  • 专利详细信息:   CN107768379-A 06 Mar 2018 H01L-027/11563 201826 Pages: 14 Chinese
  • 申请详细信息:   CN107768379-A CN10777020 01 Sep 2017
  • 优先权号:   CN10777020

▎ 摘  要

NOVELTY - A low-power charge trapping memory has silica tunneling layer, capture layer containing graphene oxide quantum dots-zirconium-hafnium composite (I), silica barrier layer and palladium top electrode. USE - Low-power charge trapping memory used for electronic device. ADVANTAGE - The low-power charge trapping memory has low operating voltage, excellent fatigue resistance and durability, and low charge leakage and power consumption. DETAILED DESCRIPTION - A low-power charge trapping memory has silica tunneling layer, capture layer containing graphene oxide quantum dots-zirconium-hafnium composite of formula: GQODs/Zr0.5Hf0.5O2 (I), silica barrier layer and palladium top electrode. An INDEPENDENT CLAIM is included for preparation of low-power charge trapping memory.