▎ 摘　　要

NOVELTY - Surfaces of cores (C1) are coated with a polymer, and the polymer coated surface of cores is thermally-treated, to form a graphene layer (C2) covering the surfaces of cores. USE - Formation of nano dots used for forming charge trap layer used in fabrication method of non-volatile memory device (both claimed) such as dynamic random access memory used for storing data. ADVANTAGE - The nano dots are formed efficiently on the surface of cores. The non-volatile memory device including charge trap layer containing nano dots has improved reliability and can be operated efficiently even at high temperature. DETAILED DESCRIPTION - Surfaces of cores are coated with a polymer, and the polymer coated surface of cores is thermally-treated, to form a graphene layer covering the surfaces of cores. Thus, the formation method of nano dots is performed. The cores include metal particles for trapping charge and to function as graphitization catalyst. The thermal treatment of cores is carried out in presence of inert atmosphere or in reduced atmosphere. The core is formed on a substrate. The metal is chosen from nickel, cobalt, iron, platinum, gold, aluminum, chromium, copper, magnesium, manganese, molybdenum, rhodium, silicon, tantalum, titanium, tungsten, uranium, vanadium and zirconium. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of semiconductor memory device. Substrate (40) Impurity region (42,44) Tunneling layer (46) Charge trap layer (48) Nano dots (48a) Blocking layer (50) Gate electrode (52) Core (C1) Graphene layer (C2) Gate structure (GS)