• 专利标题:   Vertical transistor device comprises top source/drain region positioned vertically above portion of bottom source/drain region, and vertically oriented semiconductor structure positioned between bottom and top source/drain region.
  • 专利号:   US2021242316-A1, US11094791-B1
  • 发明人:   CIMINO S, STREHLOW E, PRABHU M, NAYYAR N, REN H, SUN K, PRITCHARD D, YANG H
  • 专利权人:   GLOBALFOUNDRIES US INC
  • 国际专利分类:   H01L029/66, H01L029/78, H01L029/08, H01L029/16, H01L029/417, H01L029/47
  • 专利详细信息:   US2021242316-A1 05 Aug 2021 H01L-029/417 202169 English
  • 申请详细信息:   US2021242316-A1 US776711 30 Jan 2020
  • 优先权号:   US776711

▎ 摘  要

NOVELTY - Vertical transistor device 100 comprises bottom source/drain region including first multiple layers of two-dimensional (2D) material. The first multiple layers of 2D material has respective periodic crystallographic pattern with respective rotational orientation about first reference axis of rotation relative to each adjacent layer of first multiple layers of 2D material. The top source/drain region comprises second multiple layers of 2D material. The top source/drain region is positioned vertically above portion of bottom source/drain region. The vertically oriented semiconductor structure 102 is positioned vertically between bottom source/drain region and top source/drain region. The vertically oriented semiconductor structure has vertical height and outer perimeter. The gate structure is positioned all around outer perimeter of vertically oriented semiconductor structure for portion of vertical height of vertically oriented semiconductor structure. USE - Vertical transistor device. ADVANTAGE - The vertical transistor device improves performance capabilities and electrical performance. DESCRIPTION OF DRAWING(S) - The drawing shows schematic view of vertical transistor device. Vertical transistor device (100) Semiconductor structure (102) Surface (102S) Two-dimensional material layers (104)