▎ 摘　　要

NOVELTY - The method involves forming a graphene layer structure (115) on the surface, where the graphene layer structure is arranged on and across a portion of both the insulating region (110) and the adjacent semiconducting region. A layer of dielectric material (120) formed on a portion of the graphene layer structure which is itself arranged on the semiconducting region. A source contact (125) provided on a portion of the graphene layer structure which is itself arranged on the insulating region. A gate contact (130) provided on the layer of dielectric material and above a portion of the graphene layer structure which is itself arranged on the semiconducting region and a drain contact (135) provided on the semiconducting region of the substrate surface. A semiconductor substrate (105) comprises silicon, germanium or a III-V semiconductor, preferably one or more of Si, SiC, Ge, GaN, AIGaN. USE - Method for manufacturing graphene transistor. ADVANTAGE - The provision of a flat graphene layer allows for improved electronic properties which enable enhanced transistor performance. The method allows for the manufacture of a transistor comprising graphene along with the other components necessary to allow the electronic device to operate whilst also not being detrimental to the graphene properties. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a device for manufacturing a graphene transistor. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of the graphene transistor. Semiconductor substrate (105) Insulating region (110) Graphene layer structure (115) Dielectric material (120) Source contact (125) Gate contact (130) Drain contact (135)