• 专利标题:   Method for fabricating gate-all-around (GAA) device for manufacturing semiconductor integrated circuit, involves extending nanobar in direction parallel to horizontal plane and normal to vertical plane defined by graphene layer.
  • 专利号:   US9711607-B1
  • 发明人:   YANG C, LIU C, LIN H, YEH L
  • 专利权人:   TAIWAN SEMICONDUCTOR MFG CO LTD, UNIV TAIWAN NAT
  • 国际专利分类:   H01L021/02, H01L021/20, H01L027/12, H01L029/06, H01L029/423, H01L029/66, H01L029/78
  • 专利详细信息:   US9711607-B1 18 Jul 2017 H01L-029/423 201749 Pages: 38 English
  • 申请详细信息:   US9711607-B1 US130527 15 Apr 2016
  • 优先权号:   US130527

▎ 摘  要

NOVELTY - The method involves providing (202) substrate including insulating layer and defining horizontal plane. The metal portion is formed within the insulating layer. The lateral surface of metal portion is exposed. The graphene layer is formed (216) on the exposed lateral surface, that defines vertical plane perpendicular to the horizontal plane and parallel to the exposed lateral surface. The nanobar is formed on graphene layer. The nanobar is extended in direction parallel to the horizontal plane and normal to the vertical plane defined by the graphene layer. USE - Method for fabricating gate-all-around (GAA) device for manufacturing semiconductor integrated circuit and device such as P-type device or N-type device for electronic device. ADVANTAGE - The end portion of the nanobar is extended into the cavity or bar-supporting hole, so as to provide structural support to the nanobar. The GAA device can be fabricated efficiently. The nanobars can be obtained at low cost in simple manner. DESCRIPTION OF DRAWING(S) - The drawing shows the flow diagram illustrating the process for fabricating GAA device. Process for fabricating GAA device (200) Step to provide substrate including insulating layer and defining horizontal plane (202) Step to pattern insulating layer (204) Step to deposit metal layer on patterned insulating layer (206) Step to form graphene layer on the exposed lateral surface (216)