• 专利标题:   Preparing graphene ink useful in electronic circuit, e.g. comprises mixing graphene oxide, palladium salt, first solvent and acid, dispersing gas phase silicon dioxide in first mixing system, performing vacuum drying treatment to second mixing system, and loading palladium salt particles.
  • 专利号:   CN113881275-A
  • 发明人:   SUN S, ZHANG L, WU X
  • 专利权人:   SHANGHAI XIGU ENERGY TECHNOLOGY CO LTD, DUOLING NEW MATERIAL TECHNOLOGY CO LTD
  • 国际专利分类:   C09D011/03, C09D011/102, C09D011/52, H05K003/12
  • 专利详细信息:   CN113881275-A 04 Jan 2022 C09D-011/03 202229 Chinese
  • 申请详细信息:   CN113881275-A CN11299852 04 Nov 2021
  • 优先权号:   CN11299852

▎ 摘  要

NOVELTY - Preparing graphene ink comprises mixing the graphene oxide, palladium salt, first solvent and acid to obtain first mixing system, dispersing the gas phase silicon dioxide in the first mixing system to obtain second mixing system, performing vacuum drying treatment to the second mixing system, loading the palladium salt particles formed by the palladium salt and acid reaction on the graphene oxide, coating the graphene oxide loaded with palladium salt particles with gas phase silicon dioxide particles to obtain palladium catalyst-graphene oxide-gas phase silicon dioxide composite particles, and palladium catalyst-graphene oxide-gas phase silicon dioxide composite particles and resin, second solvent, conductive carbon black, dispersing agent, flatting agent and antifoaming agent to obtain the graphene ink. USE - The graphene ink is useful in electronic circuit. ADVANTAGE - The method only needs three steps of surface cleaning, screen printing and copper sinking, greatly shortens process steps of chemical copper deposition, and greatly reduces use of chemical reagents in the copper deposition process. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are also included for: (1) graphene ink; and (2) manufacturing printed circuit board, comprising providing the graphene ink, printing the graphene ink on the substrate of the circuit board to form circuit pattern, and forming copper layer on the surface of the circuit pattern.