▎ 摘　　要

NOVELTY - A FET is formed by depositing a channel material (203) on a substrate (201), where the channel material comprises graphene or a nanostructure; forming a gate (301) over the channel material; forming spacers (302) adjacent to the gate; depositing a contact material over the channel material, the gate, and the spacers; depositing a dielectric material over the contact material; and patterning the contact material to form a self-aligned contact for the FET, where the self-aligned contact is located over a source region and a drain region of the FET. USE - Method for forming a FET (claimed). ADVANTAGE - The method can provide a self-aligned contact over the source/drain regions in a graphene/nanostructure FET using a contact material with a relatively low contact resistance, so that a FET with good operating characteristics can be achieved. DETAILED DESCRIPTION - Formation of a FET comprises: (A) depositing a channel material (203) on a substrate (201), where the channel material comprises graphene or a nanostructure; (B) forming a gate (301) over a first portion of the channel material; (C) forming spacers (302) adjacent to the gate; (D) depositing a contact material over the channel material, the gate, and the spacers; (E) depositing a dielectric material over the contact material; (F) removing a portion of the dielectric material and a portion of the contact material to expose the top of the gate; (G) recessing the contact material; (H) removing the dielectric material; and (I) patterning the contact material to form a self-aligned contact for the FET, where the self-aligned contact is located over a source region and a drain region of the FET, and the source region and the drain region comprise a second portion of the channel material. An INDEPENDENT CLAIM is included for a FET, comprising a substrate; a channel material located on the substrate and comprising graphene or a nanostructure; a gate located on a first portion of the channel material; and a contact aligned to the gate and comprising a metal silicide, a metal carbide, or a metal. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a FET device after gate and spacer formation. Substrate (201) Channel material (203) FET device (300) Gate (301) Spacers (302)