▎ 摘　　要

NOVELTY - Forming an interconnect structure, comprises: etching a patterned interconnect stack to form first conductive lines (202) and expose a top surface of a first etch stop layer; etching the first etch stop layer (210) to form second conductive lines (212) and expose a top surface of a barrier layer (106); and forming a self-aligned via. The sputtered hard mask comprises silicon oxide, the second conductive lines comprise ruthenium, and the dilution gas comprises nitrogen. The first metal layer and the second metal layer comprises at least one of tungsten, cobalt, ruthenium, molybdenum, aluminum, copper, silicide, or graphene. The first etch stop layer and the second etch stop layer comprises at least one of tantalum, tantalum nitride, titanium, titanium nitride, tungsten, cobalt, ruthenium, niobium, or niobium nitride. The hard mask layer comprises at least one of silicon oxide, silicon nitride, silicon carbide, aluminum oxide, or aluminum nitride. USE - The method is useful for: forming an interconnect structure (claimed) for semiconductor devices; and creating interconnect structures with aligned vias and/or contacts using a subtractive process. ADVANTAGE - The method: enables vias to be aligned (relative to the bottom line) based on a subtractive scheme to form self-aligned subtractive scheme, which allows for formation of an interconnect structure with or without a metal barrier layer/liner; provides self-alignment of the via; provides an integrated etch process; facilitates etching with passivation that reduces erosion/necking of the sidewalls of first conductive lines by preventing an active species (e.g. radicals or energetic ions) from reacting with the first conductive lines; has integrated system, which prevents oxidation of the first etch stop layer or barrier layer that can increase resistivity of the first etch stop layer or barrier layer, and prevents oxidation of the liner that can increase resistivity of the liner; and is capable of rotating the substrate during processing (either continuously or in steps) that may help to produce a more uniform deposition or etch by minimizing the effect of local variability in gas flow geometries. DESCRIPTION OF DRAWING(S) - The figure shows an isometric view of an interconnect structure. Substrate (102) Barrier layer (106) First conductive lines (202) First etch stop layer (210) Second conductive lines (212)