• 专利标题:   FET, has source and drain contact electrodes and graphene trench region that are linked together, where graphene trench region is formed on upper part of insulating substrate.
  • 专利号:   CN102479819-A
  • 发明人:   LIU X, LIU M, HAN M, JI Z, WANG H, SHANG L
  • 专利权人:   INST MICROELECTRONICS CHINESE ACAD SCI
  • 国际专利分类:   H01L021/336, H01L029/16, H01L029/78
  • 专利详细信息:   CN102479819-A 30 May 2012 H01L-029/78 201243 Pages: 10 Chinese
  • 申请详细信息:   CN102479819-A CN10573807 30 Nov 2010
  • 优先权号:   CN10573807

▎ 摘  要

NOVELTY - The FET has an insulating substrate whose upper part is provided with a graphene trench region. A top gate region is formed on an upper part of the graphene trench region. Source and drain contact electrodes are arranged on two sides of the substrate, respectively. The graphene trench region and the source and drain contact electrodes are linked together. The graphene trench region is provided with monolayer graphite. Thickness of a graphene material is 0.8-1.2nm. The substrate is provided with an n-type or p-type silicon sheet. USE - FET. ADVANTAGE - The graphene material has high carrier mobility. The graphene trench region improves processing speed of the FET. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a method for manufacturing a FET. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a FET.