▎ 摘　　要

NOVELTY - The FET has a gate dielectric layer (15) formed on a grid metal layer (16). A self-aligned metal layer (17) is connected with a semiconductor substrate (10) and an insulating layer (11). A conductive channel (12) is formed in the insulating layer. The conductive channel is provided with a graphite and source electrode (13). A drain electrode (14) is matched with the conductive channel. The self-aligned metal layer is covered on the source electrode, the drain electrode, the conductive channel and the grid metal layer. USE - Self-aligned graphene FET. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a self-aligned graphene FET preparing method. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a self-aligned graphene FET. Semiconductor substrate (10) Insulating layer (11) Conductive channel (12) Source electrode (13) Drain electrode (14) Gate dielectric layer (15) Grid metal layer (16) Self-aligned metal layer (17)