• 专利标题:   Graphene FET manufacturing method, involves forming semiconductor substrate with alignment mark unit, strip-shaped graphite module provided with electric conduction channel, and completing wet etching process.
  • 专利号:   CN105006482-A, CN105006482-B
  • 发明人:   CHEN S, HU S, SHE S
  • 专利权人:   SHANGHAI INTEGRATED CIRCUIT RES DEV CE, SHANGHAI INTEGRATED CIRCUIT RES DEV CE
  • 国际专利分类:   H01L023/544, H01L029/66
  • 专利详细信息:   CN105006482-A 28 Oct 2015 H01L-029/66 201582 Chinese
  • 申请详细信息:   CN105006482-A CN10396895 08 Jul 2015
  • 优先权号:   CN10396895

▎ 摘  要

NOVELTY - The method involves forming a semiconductor substrate with an alignment mark unit (S01). A graphene film layer is formed (S02) with the semiconductor substrate. A strip-shaped graphite module is provided (S03) with an electric conduction channel. A source electrode terminal is connected (S04) with a drain electrode terminal. Wet etching process is completed. A silicon dioxide layer is formed with a high doped silicon substrate. Strip-shaped graphite surface coating photo-resisting process is completed. USE - Graphene FET manufacturing method. ADVANTAGE - The method enables improving processing efficiency and reducing processing cost. DESCRIPTION OF DRAWING(S) - The drawing shows a flow diagram illustrating a graphene FET manufacturing method. '(Drawing includes non-English language text)' Step for forming semiconductor substrate with alignment mark unit (S01) Step for forming graphene film layer with semiconductor substrate (S02) Step for providing strip-shaped graphite module with electric conduction channel (S03) Step for connecting source electrode terminal with drain electrode terminal (S04)