• 专利标题:   Semiconductor transistor e.g. non-doped source/drain transistor, includes gate structure on high-k gate dielectric layer, comprising side walls and gate, where main width is greater than or equal to sub width, and source and drain which are provided on both sides of gate structure.
  • 专利号:   CN113659077-A
  • 发明人:   LIN Y, XU L, LIANG S, ZHANG Z
  • 专利权人:   BEIJING HUATANYUANXIN ELECTRONIC TECHNOL, UNIV PEKING, BEIJING YUANXIN CARBONBASED INTEGRATED
  • 国际专利分类:   H01L051/05, H01L051/30, H01L051/40
  • 专利详细信息:   CN113659077-A 16 Nov 2021 H01L-051/05 202214 Chinese
  • 申请详细信息:   CN113659077-A CN10398034 12 May 2020
  • 优先权号:   CN10398034

▎ 摘  要

NOVELTY - A semiconductor transistor includes substrate (100), and a semiconductor channel layer (101) which is provided on substrate, where high-k gate dielectric layer with first width is provided on semiconductor channel layers (101,102). A gate structure with second width is provided on high-k gate dielectric layer. The gate structure includes two side walls and a gate (103), where first width is greater than or equal to second width, and a source (106) and a drain (107) are provided on both sides of gate structure. USE - Semiconductor transistor e.g. non-doped source/drain transistor and silicon-based transistor, for use in electronic industry. ADVANTAGE - The transistor optimizes the energy band distribution of semiconductor transistor, especially narrow band gap semiconductor transistor. By adjusting energy band of source and drain terminals, the off-state current and static energy consumption is suppressed, is compatible with industrialized semiconductor process, and enables large-scale integrated manufacturing. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for method for manufacturing semiconductor transistor. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of the source/drain structure. Substrate (100) Semiconductor channel layers (101,102) Gate (103) Side wall (105) Source (106) Drain (107)