• 专利标题:   Forming dual damascene structure on semiconductor substrate, involves selectively depositing carbon layer on exposed metal surface.
  • 专利号:   WO2023004328-A1, TW202314022-A
  • 发明人:   PARBATANI A, VAN SCHRAVENDIJK B J, VARADARAJAN B N, NARKEVICIUTE I, SRINIVASAN E, SHARMA K, KNARR R, SCHMITZ S, RAMANAN V, NOGAMI T, NGUYEN S V, HUANG H, SHOBHA H K, LI J, PEETHELA C B, EDELSTEIN D C
  • 专利权人:   LAM RES CORP, INT BUSINESS MACHINES CORP
  • 国际专利分类:   C23C016/26, C23C016/452, H01L021/02, H01L021/32, H01L021/768, C23C016/22, C23C016/513, H01L023/535
  • 专利详细信息:   WO2023004328-A1 26 Jan 2023 H01L-021/768 202314 Pages: 56 English
  • 申请详细信息:   WO2023004328-A1 WOUS073905 19 Jul 2022
  • 优先权号:   US203480P

▎ 摘  要

NOVELTY - Forming a dual damascene structure on a semiconductor substrate comprises: providing the semiconductor substrate comprising a first dielectric layer and a copper interconnect in the first layer, and a cobalt cap on the interconnect, where the cobalt cap has an exposed metal surface comprising cobalt; and selectively depositing carbon layer on the metal surface. The selectively depositing the carbon layer on the exposed metal surface comprises flowing at least one hydrocarbon precursor into a reaction chamber and towards the semiconductor substrate, generating, from a hydrogen source gas, radicals of hydrogen in a remote plasma source, and introducing the radicals of hydrogen into the reaction chamber and towards the semiconductor substrate, where the radicals of hydrogen react with the hydrocarbon precursors to deposit the carbon layer on the exposed metal surface. USE - The method is useful for forming a dual damascene structure on a semiconductor substrate (claimed). ADVANTAGE - The method enables to form dual damascene structure on a semiconductor substrate that has high electrical conductivity, high thermal conductivity and good mechanical strength and toughness, optical transparency, and high electron mobility, among other favorable properties. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for semiconductor device. DESCRIPTION OF DRAWING(S) - The figure illustrates process flow diagram of depositing graphene on a metal surface of a substrate. 500Selective deposition using graphene 510Providing semiconductor substrate with cobalt cap on copper interconnect 520Selectively depositing graphene on exposed cobalt 530Depositing dielectric material over substrate 540Optionally treating graphene to non-direct plasm