• 专利标题:   Graphene device manufacturing method involves testing metal electrode around self aligned metal layer, so as to partially cover self-aligned metal layer.
  • 专利号:   CN107275219-A
  • 发明人:   PENG S, JIN Z, ZHANG D, SHI J
  • 专利权人:   INST MICROELECTRONICS CHINESE ACAD SCI
  • 国际专利分类:   H01L021/336
  • 专利详细信息:   CN107275219-A 20 Oct 2017 H01L-021/336 201777 Pages: 11 Chinese
  • 申请详细信息:   CN107275219-A CN10391940 27 May 2017
  • 优先权号:   CN10391940

▎ 摘  要

NOVELTY - The method involves growing (S31) an insulating layer on a substrate, and continuously growing a graphene layer on the insulating layer. A T type gate structure is formed (S34) on the metal layer of the active region. The metal mask in the active region is removed (S35), and the surface pre-treatment of the exposed graphene is favorable to form ohmic contacts. The self aligned metal layer is deposited (S36) by mask with T type gate structure. A metal electrode around the self aligned metal layer is tested (S37), so as to partially cover the self-aligned metal layer. USE - Graphene device manufacturing method. ADVANTAGE - The process organic residue to the graphene surface contamination can be avoided, so as to greatly reduce the parasitic resistance of the graphene device. The direct current and frequency characteristics of the device can be improved. DETAILED DESCRIPTION - A metal mask layer is deposited (S32) on the device. An active region etching for metal mask and graphene conductive layer is performed (S33). DESCRIPTION OF DRAWING(S) - The drawing shows a flowchart illustrating the graphene device manufacturing process. (Drawing includes non-English language text) Step for growing insulating layer on substrate and continuously growing graphene layer on insulating layer (S31) Step for depositing metal mask layer on device (S32) Step for performing active region etching for metal mask and graphene conductive layer (S33) Step for forming T type gate structure on metal layer of active region (S34) Step for removing metal mask in active region (S35) Step for depositing self aligned metal layer by mask with T type gate structure (S36) Step for testing metal electrode around self aligned metal layer so as to partially cover self-aligned metal layer (S37)