▎ 摘　　要

NOVELTY - The method involves preparing a large-area two-dimensional semiconductor channel material. A working substrate is prepared with a metal mark. The working substrate is cleaned. Coating photoresist is spun on the processed working substrate. A patterned metal electrode is prepared. The coating photoresist spun on the working substrate is processed with patterned graphene electrode and two-dimensional semiconductor material. UV exposure photo-etching and developing processes are utilized. An electron beam is utilized to evaporate the metal mark. Glue and peeling off are removed for obtaining the patterned metal electrode. The working substrate is formed as a silicon dioxide/silicon (SiO2/Si) substrate and sapphire substrate. USE - Method for constructing a two-dimensional semiconductor device array based on a graphene electrode in microelectronic and device application fields. ADVANTAGE - The method enables realizing the controllable construction of the device array, and designing structure of the two-dimensional semiconductor/graphene vertical heterojunction can be utilized as an electrode under the physical field e.g. illumination and gate voltage field, and utilized as channel combined with pure two-dimensional semiconductor material channel. DESCRIPTION OF DRAWING(S) - The drawing shows a flow diagram illustrating a method for constructing a two-dimensional semiconductor device array based on a graphene electrode. (Drawing includes non-English language text).