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  • 专利标题:   Manufacture of via electrode involves forming via hole at substrate, forming catalyst layer at sidewall and bottom of via hole, and forming graphene layer in via hole by exposing the catalyst layer to solution mixed with graphene particles.
  • 专利号:   US2012086132-A1, KR2012035829-A, US8404588-B2, KR1804837-B1
  • 发明人:   KIM D, BAEK K, PARK K, PARK J M, KIM Z S, KIM J Y, JEONG Y S, DO L, KIM D P, BAEK K H, DO LEE M
  • 专利权人:   ELECTRONICS TELECOM RES INST, ELECTRONICS TELECOM RES INST, ELECTRONICS TELECOM RES INST
  • 国际专利分类:   B82Y040/00, B82Y099/00, H01L021/02, H01L021/768, H01L023/48, H01L021/28, H01L021/3205, H01L021/44, C01B031/04, H01L021/48
  • 专利详细信息:   US2012086132-A1 12 Apr 2012 H01L-023/48 201227 Pages: 11 English
  • 申请详细信息:   US2012086132-A1 US267215 06 Oct 2011
  • 优先权号:   KR097300, KR011565

▎ 摘　　要

NOVELTY - A via electrode is manufactured by forming a via hole (102) at a substrate (101), forming a catalyst layer (104) at sidewall and bottom of a via hole, and forming a graphene layer in the via hole by exposing the catalyst layer to a solution mixed with graphene particles. USE - Manufacture of via electrode. ADVANTAGE - Void defect or seam defect of the graphene layer in the via hole can be prevented, thus, production yield can be increased. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a via electrode. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of the process of manufacturing a via electrode. Substrate (101) Via hole (102) Insulation film (103) Catalyst layer (104) 2nd graphene layer (111)