▎ 摘　　要

NOVELTY - The graphene infrared detector has a silicon substrate layer (2), a supporting substrate (12), a transistor and a metal interconnection layer fabricated by a CMOS front-end process, and a TSV through hole (13). The transistor and the metal interconnection layer fabricated by the CMOS front-end process are arranged between the bonded silicon substrate layer and the supporting substrate. The transistor fabricated by the CMOS front-end process includes a silicon well (3) mounted on the bottom surface of the silicon substrate layer. An active region (4) and a drain region (5) are arranged on the silicon well. A gate (6) is arranged between the source region and the drain region. A borophosphosilicate glass layer is deposited on the surface of the buffer isolation layer, and a metal insulator material layer is deposited under the borophosphosilicate glass layer. A second passivation layer (14) is deposited on the surface of a TSV through hole (13). USE - Graphene infrared detector based on back-illuminated complementary metal-oxide-semiconductor (CMOS) process for digital image. ADVANTAGE - The back-illuminated CMOS preparation graphene infrared detector separates the electric component from the light, avoids the absorption of the light by the metal wiring layer, and reflects to obtain higher quantum efficiency, realizing higher quality of imaging using the graphene capable of absorbing light, because of the high carrier mobility and the wide spectrum absorption of infrared band, so that the infrared light graphene has very fast response speed and the response bandwidth of the full wave band. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a preparation method detector graphene on backilluminated CMOS process. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of the infrared detector. Bonded silicon substrate layer (2) Multi-layer graphene (3) Surface region (4) Preparation method (5) Gate electrode (6) Buffer isolation layer (7) Metal aluminium layer (10) First passivation layer (11) Support substrate layer (12) Hole (13) Second passivation layer (14) Graphene layer (15) Graphene top electrode (16)