▎ 摘　　要

NOVELTY - The circuit has a graphene layer including a region of undoped graphene (401), where the undoped graphene is connected with a channel (903) of a transistor (900b) and a region of doped graphene (402) is connected with a contact (904) of the transistor. A dielectric layer is located on top of the graphene layer and underneath a gate (902) of the transistor. A top level interconnect is etched on top of the dielectric layer. A substrate is located underneath the graphene layer. A mask is applied to a portion of an etched graphene region. USE - Metal-free complementary metal oxide on semiconductor integrated circuit for use in semiconductor chip fabrication field. ADVANTAGE - The circuit allows carbon and oxide material to provide transparent and flexible circuits that can be easily stacked to produce multilayer circuits that are environment-friendly. The circuit eliminates limited thermal budget and tool cross-contamination. DETAILED DESCRIPTION - The dielectric layer and the substrate are made of oxide material. The doped graphene is made of polyethylemneimine or diazonium. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a transistor including graphene and carbon nanotubes. Undoped graphene (401) Doped graphene (402) Transistor (900b) Gate (902) Channel (903) Contact (904)