▎ 摘　　要

NOVELTY - The gate memristor comprises a metal-oxide semiconductor field-effect transistor (MOSFET) transistor and a ferroelectric tunnel junction (9) which is provided with a substrate (1). A common semiconductor layer (2) is arranged on the substrate. The first graphene layer (7) is arranged between a first graphene sheet and a second graphene sheet (8). The ferro-electrode layer (6), the second graphene layer, and the first graphene layers are arranged sequentially between the ferro-electrode layer and a common electrode on the same side. USE - High integrated degree gate memristor for use in microelectronic device. ADVANTAGE - The gate memristor has high switching speed, non-volatile, low power consumption, high expandability and compatible with complementary metal oxide semiconductor (CMOS) characteristics. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a preparation method of high integration degree gate memristor. DESCRIPTION OF DRAWING(S) - The drawing shows a structure schematic diagram of a high-integration gate memristor. (Drawing includes non-English language text). 1Substrate 2Common semiconductor layer 3First common electrode 4Gate electrode 5Second common electrode 6Ferro-electrode layer 7First graphene layer 8Second graphene sheet 9Ferroelectric tunnel junction