• 专利标题:   Semiconductor device comprises stack of layers defining sidewall surface and comprising source and drain layers, channel structure extending through stack of layers, oriented in vertical direction perpendicular to main surface of stack of layers.
  • 专利号:   US2023187280-A1
  • 发明人:   FULFORD H J, GARDNER M I
  • 专利权人:   TOKYO ELECTRON LTD
  • 国际专利分类:   H01L021/822, H01L027/06, H01L027/11556, H01L027/11568, H01L029/786
  • 专利详细信息:   US2023187280-A1 15 Jun 2023 H01L-021/822 202352 English
  • 申请详细信息:   US2023187280-A1 US546755 09 Dec 2021
  • 优先权号:   US546755

▎ 摘  要

NOVELTY - Semiconductor device (100A) comprises stack (110a) of layers defining a sidewall surface (119a) and comprising source and drain layers, a channel structure (120) extending through the stack of layers, oriented in a vertical direction perpendicular to a main surface of the stack of layers, and configured to have a current flow path in the vertical direction. The channel structure comprises a two-dimensional (2D) semiconductor material, a core structure positioned inside and surrounded by the channel structure, and a gate structure surrounding portion of the channel structure. USE - Semiconductor device of NAND flash memory. ADVANTAGE - The semiconductor device enable 2D semiconductor materials, which are high mobility materials, to be utilized in 3D horizontal stacking of semiconductor devices with enhanced device performance and without necessarily using a semiconductor base. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method of fabricating a semiconductor device, which involves forming a stack of layers which defines a sidewall surface and comprises source and drain layers, forming a channel structure that extends through the stack of layers, is oriented in a vertical direction perpendicular to a main surface of the stack of layers, and is configured to have a current flow path in the vertical direction, where the channel structure comprises a two-dimensional (2D) semiconductor material, forming a core structure positioned inside and surrounded by the channel structure, and forming a gate structure surrounding at least part of the channel structure. DESCRIPTION OF DRAWING(S) - The drawing shows a vertical cross-sectional view of a semiconductor device. 100ASemiconductor device 110aStack 119aSidewall surface 120Channel structure 131aHigh-k dielectric