• 专利标题:   Field effect transistor comprises graphene channel layer on a substrate, where layer defines slit; source electrode and drain electrode to apply voltages to layer; gate electrode on channel layer; and gate insulation layer.
  • 专利号:   US2014014905-A1, KR2014010720-A, US9040957-B2, KR1910976-B1
  • 发明人:   LEE J, PARK S, BYUN K, SEO D, SONG H, SHIN H, CHUNG H, HEO J, LEE J H, PARK S J, BYUN K E, SONG H J, SHIN H C, CHUNG H J, HEO J S
  • 专利权人:   UNIV SEOUL NAT R DB FOUND, SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO LTD, SNU R DB FOUND, UNIV SEOUL NAT R DB FOUND
  • 国际专利分类:   H01L029/66, H01L029/78, H01L021/336, B82Y010/00, H01L029/06, H01L029/10, H01L029/16, H01L029/786
  • 专利详细信息:   US2014014905-A1 16 Jan 2014 H01L-029/78 201406 Pages: 18 English
  • 申请详细信息:   US2014014905-A1 US772693 21 Feb 2013
  • 优先权号:   KR077368

▎ 摘  要

NOVELTY - A field effect transistor comprises a substrate (910); a graphene channel layer (930) on the substrate, where the graphene channel layer defines a slit (935); a source electrode and a drain electrode spaced apart from each other, where the source electrode and the drain electrode are configured to apply voltages to the graphene channel layer; a gate electrode (973) on the graphene channel layer; and a gate insulation layer (950) between the graphene channel layer and the gate electrode. USE - As field effect transistor (claimed). ADVANTAGE - The transistor effectively uses graphene having very high electric conductivity, high heat conductivity, and high elasticity as channel layer. The transistor has a high ON/OFF ratio of operation currents. The transistor exhibits improved quality due to the presence of graphene layer. DETAILED DESCRIPTION - A field effect transistor comprises a substrate (910); a graphene channel layer (930) on the substrate, where the graphene channel layer defines a slit (935); a source electrode and a drain electrode spaced apart from each other, where the source electrode and the drain electrode are configured to apply voltages to the graphene channel layer; a gate electrode (973) on the graphene channel layer; and a gate insulation layer (950) between the graphene channel layer and the gate electrode. The field effect transistor further comprises a potential barrier material filling the slit of the graphene channel layer, where the potential barrier material is configured to induce Fowler-Nordheim (F-N) tunneling through the graphene channel layer when a gate voltage is applied to the gate electrode. An INDEPENDENT CLAIM is included for a method of fabricating field effect transistor, involving: forming a graphene channel layer on a substrate; forming a slit in the graphene channel layer; forming a source electrode and a drain electrode that are spaced apart from each other, where the source and the drain electrode are configured to apply voltages to the graphene channel layer; forming a gate electrode on the graphene channel layer; forming a gate insulation layer between the graphene channel layer and the gate electrode; and filling the slit with a potential barrier material, where the potential barrier material is configured to induce Fowler-Nordheim (F-N) tunneling through the graphene channel layer when a gate voltage is applied to the gate electrode. The step of forming the slit includes using e-beam lithography. DESCRIPTION OF DRAWING(S) - The figure shows sectional view of field effect device. Substrate (910) Graphene channel layer (930) Slits (935) Gate insulating layers (950) First electrodes (971) Second electrodes (972) Gate electrodes (973)