▎ 摘　　要

NOVELTY - The FET (10) has the left and right graphene layers (14,18) that are provided on a substrate (12). A fluorographene layer (16) is provided on the substrate between the graphene layers. The left and right N-type ohmic contacts (24,26) are provided on the graphene layers. A gate (20) is aligned over the fluorographene layer. A gate dielectric layer (22) is provided between the gate and the fluorographene layer, and between the gate and the ohmic contacts. The fluorographene and graphene layers are configured to form a normally off channel. USE - FET such as graphene heterostructure FET used in integrated circuit (claimed). ADVANTAGE - Since the fluorographene and graphene layers are configured to form normally off channel, the improved graphene heterostructure FET is achieved. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are included for the following: (1) an integrated circuit; and (2) a method for fabricating the heterostructure FET. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of the n-type graphene, fluorographene, and graphene heterostructure FET. Graphene heterostructure FET (10) Substrate (12) Left graphene layer (14) Fluorographene layer (16) Right graphene layer (18) Gate (20) Gate dielectric layer (22) Left N-type ohmic contact (24) Right N-type ohmic contact (26)