▎ 摘　　要

NOVELTY - The device (400) has a channel comprising a bilayer graphene layer formed on a first dielectric layer, where the first dielectric layer provides a flat surface on which the channel is formed. A second dielectric layer is formed over the bilayer graphene layer. A local gate is formed over the second dielectric layer and capacitively coupled to the channel with the bilayer graphene layer, where the local gate forms a pair of gate elements (405) to locally control a portion of the bilayer graphene layer. USE - Local dual gates graphene based electronic device i.e. FET, for amplifying, switching and detecting signals during fabrication of an integrated circuit (claimed). ADVANTAGE - The bilayer graphene layer includes patterned top and bottom gates to bias different voltages on different devices on a same wafer to different band gap or threshold voltage depending on device or circuit requirements with effective properties of graphene. The top and bottom gates are patterned to reduce a gate leakage problem. The device is designed such that angle, dose and energy of ion implantation can be effectively selected to provide high conductivity to source and drain regions to minimize source and drain resistance of a transistor to be formed. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of a local dual gates graphene based electronic device. Substrate (105) Insulator (110) Local dual gates graphene based electronic device (400) Gate elements (405, 410, 415)